Glossary

The reciprocal of impedance: $Y = 1/Z = G + jB$. Measured in siemens. $G$ is conductance, $B$ is susceptance.

Electric current that periodically reverses direction, typically sinusoidal. Mains power (50/60 Hz) is AC. Analysis uses phasors and complex impedance.

Modulation where carrier amplitude varies with message signal. $s(t) = A_c[1 + m \cdot x(t)]\cos(2\pi f_c t)$. Simple but inefficient; only 1/3 of power carries information. Bandwidth = 2× message bandwidth.

Digital modulation using amplitude levels for symbols. OOK (on-off keying) is binary ASK. Simple but noise-susceptible. Used in RFID, IR remotes.

Converts continuous analog voltage to discrete digital value. Resolution in bits (e.g., 10-bit = 1024 levels). Common type: SAR (successive approximation register).

Passes frequencies within a specific range, attenuates outside. Characterized by center frequency and bandwidth (or Q factor). Used in radio tuning, audio equalization.

Frequency range occupied by a signal or passed by a system. Often defined at −3dB points. Time-bandwidth product is fundamental limit: $\Delta t \cdot \Delta f \geq 1/(4\pi)$.

Encoding where each decimal digit is represented by 4 bits (0-9). Used in displays and calculators. Less efficient than pure binary but easier for human-readable output.

A three-terminal semiconductor device (emitter, base, collector) used for amplification or switching. Current-controlled: base current controls collector current via $I_C = \beta I_B$.

Ratio of bit errors to total bits transmitted. Key metric for digital communication quality. Depends on modulation scheme, SNR, and channel. Typical targets: $10^{-6}$ to $10^{-9}$.

Frequency response graph: magnitude (dB) and phase (degrees) vs. frequency (log scale). Shows bandwidth, gain, stability margins.

Mathematical system for digital logic with values 0 and 1. Operations: AND (·), OR (+), NOT (‾). Key laws: De Morgan's, absorption, consensus. Foundation of all digital design.

Step-up DC-DC converter. Output voltage: $V_{out} = V_{in}/(1-D)$. Output always higher than input. Used in battery-powered devices needing higher voltages.

Stability criterion: a system is BIBO stable if every bounded input produces bounded output. Requires all poles in left half-plane (CT) or inside unit circle (DT).

Step-down DC-DC converter. Output voltage: $V_{out} = D \times V_{in}$. Most common topology for voltage regulation. Also called step-down converter.

Filter with maximally flat passband response. No ripple but moderate roll-off. Good all-purpose choice. $|H|^2 = 1/(1+(\omega/\omega_c)^{2n})$.

Filter with sharper roll-off than Butterworth but has ripple. Type I: ripple in passband. Type II: ripple in stopband. Choose when sharp cutoff matters more than flat response.

Dominant logic family using paired NMOS/PMOS transistors. Very low static power (only during switching). Wide voltage range (1.8-5V). Full rail-to-rail output swing.

DC-DC converter operation where inductor current never reaches zero. Simpler analysis, lower ripple, but requires larger inductor.

Fundamental operation for LTI systems: $y = x * h$. Output equals input convolved with impulse response. In frequency domain: $Y(\omega) = X(\omega) \cdot H(\omega)$.

Frequency where filter response drops to −3dB (half power, 0.707× voltage). For RC low-pass: $f_c = 1/(2\pi RC)$. Marks transition between passband and stopband.

Describes how oscillations decay in second-order systems. $\zeta < 1$: underdamped (oscillates). $\zeta = 1$: critically damped. $\zeta > 1$: overdamped. Related to phase margin: $\zeta \approx PM/100$.

Two laws relating AND, OR, and NOT: $\overline{A \cdot B} = \bar{A} + \bar{B}$ and $\overline{A + B} = \bar{A} \cdot \bar{B}$. Essential for logic simplification and NAND/NOR implementations.

Logarithmic ratio unit. Power: $dB = 10\log_{10}(P_2/P_1)$. Voltage: $dB = 20\log_{10}(V_2/V_1)$. Key values: 3dB = 2× power, 6dB = 2× voltage, 20dB = 10× voltage.

Automated verification that PCB layout meets manufacturing constraints. Checks trace width, clearance, drill sizes, etc.

Converts digital value to analog voltage. Not all MCUs have hardware DAC; PWM with filtering is a common alternative.

Electric current that flows in one constant direction. Batteries and power supplies provide DC. Steady-state analysis uses simple algebra.

DC-DC converter operation where inductor current reaches zero each cycle. Output voltage depends on load. Higher ripple but smaller inductors possible.

Fourier transform for discrete, finite-length signals. Computes N frequency samples from N time samples. Basis for digital spectral analysis.

Fourier transform for infinite discrete sequences. Produces continuous periodic spectrum. $X(e^{j\omega}) = \sum x[n]e^{-j\omega n}$. DFT samples the DTFT.

Ratio of on-time to total period: $D = T_{on}/T_{period}$. Expressed as percentage (0-100%) or fraction (0-1).

Automated verification that schematic follows electrical design rules. Checks for unconnected pins, conflicting outputs, missing power connections. Run before layout.

The resistive component of a real capacitor or inductor. Causes power loss and heat. Critical in switching power supplies and filtering. Lower ESR = better high-frequency performance.

Efficient algorithm computing DFT in $O(N \log N)$ instead of $O(N^2)$. Enables real-time spectral analysis. Cooley-Tukey is most common implementation.

Family of transistors where current is controlled by an electric field. Includes MOSFETs and JFETs. High input impedance compared to BJTs.

A sequential circuit model with defined states and transitions. Moore machines: outputs depend on state only. Mealy machines: outputs depend on state and inputs.

A bistable circuit that stores one bit. Types include SR (set-reset), D (data), JK (universal), and T (toggle). Edge-triggered for synchronous operation.

Representation of periodic signals as sum of harmonically related sinusoids. $x(t) = a_0 + \sum[a_n\cos(n\omega_0 t) + b_n\sin(n\omega_0 t)]$. Reveals frequency content of periodic waveforms.

Decomposes any signal into continuous frequency spectrum. $X(j\omega) = \int x(t)e^{-j\omega t}dt$. Convolution in time becomes multiplication in frequency. Foundation of spectral analysis.

Modulation where carrier frequency varies with message signal. Better noise immunity than AM (capture effect), constant envelope. Wider bandwidth; Carson's rule: $BW \approx 2(\Delta f + f_m)$.

Digital modulation switching carrier frequency between discrete values. More robust to amplitude noise than ASK. Used in caller ID, Bluetooth (GFSK), early modems.

How much loop gain can increase before instability. Measured at phase crossover frequency (where phase = −180°). Typical design target: >6 dB.

For op-amps, the product of closed-loop gain and bandwidth is constant: $GBW = A_{closed} \times f_{-3dB}$. Higher gain means lower bandwidth.

Digital pins configurable as input or output. Each pin controlled by registers (DDR for direction, PORT for output, PIN for input on AVR). Current limited to ~20-40mA per pin.

Standard file format for PCB fabrication data. Describes copper layers, solder mask, silkscreen, drill files. Generated by PCB CAD software and sent to manufacturer.

Passes frequencies above cutoff, blocks lower frequencies including DC. Used for AC coupling, removing DC offset, edge detection.

Current vs. voltage characteristic of a PV cell or module. Key points: $I_{sc}$ (short-circuit current), $V_{oc}$ (open-circuit voltage), MPP (maximum power point).

AC equivalent of resistance: $Z = R + jX$ where $R$ is resistance and $X$ is reactance. Measured in ohms. Extends Ohm's law to AC circuits.

Output of an LTI system when input is a unit impulse $\delta(t)$ or $\delta[n]$. Denoted $h(t)$ or $h[n]$. Completely characterizes system behavior; any output is input convolved with impulse response.

Two-wire synchronous protocol: SDA (data) and SCL (clock). Supports multiple devices with 7-bit addressing. Slower than SPI but fewer wires. Used for sensors, EEPROMs, RTCs.

Function executed when hardware interrupt occurs. Must be fast and use volatile variables for shared data. Preempts normal code execution.

A FET that uses a reverse-biased PN junction as its gate. Simpler than MOSFETs but less common in modern designs. Depletion-mode only.

Visual method for simplifying Boolean expressions. Adjacent cells differ by one variable; grouping 1s reveals simplified terms. Practical for up to 4-5 variables.

The sum of currents entering any node equals zero: $\sum I_{node} = 0$. Based on conservation of charge.

The sum of voltages around any closed loop equals zero: $\sum V_{loop} = 0$. Based on conservation of energy.

Integral transform converting time-domain signals to complex frequency domain (s-domain). Simplifies differential equations to algebra. Used for continuous-time system analysis.

The bit with the smallest weight (rightmost in standard notation). In ADCs, also refers to the smallest voltage step: $LSB = V_{ref}/2^n$.

A semiconductor diode that emits light when forward biased. Forward voltage depends on color (red ~1.8V, blue ~3.3V). Requires current- limiting resistor.

System class where superposition holds (linear) and behavior doesn't change over time (time-invariant). Fully characterized by impulse response or transfer function. Most signal processing theory assumes LTI.

Passes frequencies below cutoff, attenuates higher frequencies. Used for noise removal, anti-aliasing, smoothing. RC circuit is simplest implementation.

Algorithm that continuously adjusts load to extract maximum power from PV array as conditions change. Common methods: Perturb & Observe (P&O), Incremental Conductance.

A voltage-controlled transistor with three terminals (gate, source, drain). Gate voltage controls current flow. Dominant in digital circuits due to low power consumption and high input impedance.

A computer on a chip: CPU, memory (Flash + SRAM), and peripherals integrated. Examples: Arduino (AVR), STM32 (ARM), ESP32.

The bit with the largest weight (leftmost in standard notation). Often indicates sign in signed numbers.

Frequency at which undamped system oscillates. For RLC: $\omega_n = 1/\sqrt{LC}$. Actual oscillation frequency depends on damping: $\omega_d = \omega_n\sqrt{1-\zeta^2}$.

Any linear circuit can be replaced by current source $I_N$ in parallel with resistance $R_N$. Dual of Thevenin. $I_N = V_{th}/R_{th}$, $R_N = R_{th}$.

Stability test using open-loop frequency response plotted on complex plane. Closed-loop is stable if plot doesn't encircle the −1 point (for stable open-loop systems). $Z = N + P$ relates encirclements to poles.

Fundamental relationship: $V = IR$ where voltage equals current times resistance. Applies to resistive elements in DC circuits.

High-gain differential amplifier IC. With negative feedback, follows two "golden rules": virtual short ($V_+ = V_-$) and no input current. Building block for amplifiers, filters, comparators.

Simple MPPT algorithm. Adjusts operating voltage slightly, measures power change, continues in same direction if power increased. Can oscillate around MPP.

How much phase lag can be added before instability. Measured at gain crossover frequency (where |G| = 0 dB). PM ≈ 45-60° is typical target. Roughly relates to damping: $\zeta \approx PM/100$.

Digital modulation using carrier phase for symbols. BPSK: 2 phases (1 bit/symbol). QPSK: 4 phases (2 bits/symbol). Efficient and widely used in WiFi, satellite, cellular.

Feedback system that locks output phase to input reference. Contains phase detector, loop filter, and VCO. Used for frequency synthesis, clock recovery, demodulation.

Complex number representing sinusoidal signal's magnitude and phase. $V = V_m \angle\phi$. Converts differential equations to algebra for AC circuit analysis.

Technology that converts sunlight directly to electricity using semiconductor materials. Solar cells connected in series increase voltage; parallel increases current.

The boundary between P-type and N-type semiconductor material. Forms the basis of diodes and transistors. Creates a depletion region with built-in potential (~0.7V for silicon).

Ratio of real power to apparent power: $PF = P/S = \cos\phi$. Ranges 0-1. Unity PF means purely resistive load, maximum efficiency.

Physical board with copper traces connecting electronic components. Layers: substrate, copper, solder mask, silkscreen. Design flow: schematic → layout → Gerber files → fabrication.

The workhorse of industrial control. Combines three terms: P (proportional to error), I (integral of error), D (derivative of error). $u(t) = K_p e + K_i \int e,dt + K_d \frac{de}{dt}$

Technique for analog-like control using digital signals. Duty cycle determines average voltage: $V_{avg} = D \times V_{max}$. Used for motor control, LED dimming, and DAC approximation.

Combines amplitude and phase modulation for high spectral efficiency. 16-QAM: 4 bits/symbol. 256-QAM: 8 bits/symbol. Used in cable modems, WiFi, LTE. Higher orders need better SNR.

Measures sharpness of resonance or energy storage efficiency. $Q = f_0/BW = \omega_0 L/R$. Higher Q = narrower bandwidth, sharper frequency selectivity.

The imaginary part of impedance, caused by capacitors ($X_C = -1/\omega C$) or inductors ($X_L = \omega L$). Opposes current flow but doesn't dissipate power.

A group of flip-flops storing multi-bit values. Can load (parallel), shift (serial), or hold data. Foundation of memory and data paths.

When inductive and capacitive reactances cancel: $X_L = X_C$. Resonant frequency: $f_0 = 1/(2\pi\sqrt{LC})$. Impedance becomes purely resistive.

Rate of filter attenuation beyond cutoff, in dB/decade or dB/octave. First-order: −20 dB/decade. nth-order: $-20n$ dB/decade. Steeper roll-off = sharper frequency selection but more complexity.

Graphical method showing how closed-loop poles move as loop gain varies. Poles start at open-loop poles (K=0) and move toward zeros (K→∞). Used for controller design and stability analysis.

Effective value of an AC signal that delivers equivalent power to DC. For sinusoids: $V_{RMS} = V_{peak}/\sqrt{2} \approx 0.707 V_{peak}$.

Comparator with hysteresis—two different thresholds for rising and falling inputs. Prevents oscillation from noisy signals. Creates clean digital edges from slow or noisy analog signals.

Synchronous serial protocol with clock line. Full-duplex on 4 wires: MOSI (data out), MISO (data in), SCK (clock), SS (chip select). Faster than I2C, no addressing overhead.

Ratio of signal power to noise power, usually in dB. For ideal ADC: $SNR_{max} = 6.02n + 1.76$ dB where n is bit resolution.

Frequency-domain representation showing how signal energy/power is distributed across frequencies. Magnitude spectrum $|X(\omega)|$ shows amplitudes; phase spectrum $\angle X(\omega)$ shows timing.

Most common ADC type in microcontrollers. Uses binary search algorithm: compares input to DAC output, narrowing down bit by bit. Conversion takes n cycles for n-bit resolution.

In linear circuits, total response equals sum of individual responses to each source. Analyze one source at a time (others zeroed), then add. Only valid for linear circuits.

Any linear circuit can be replaced by voltage source $V_{th}$ in series with resistance $R_{th}$. Simplifies analysis of complex networks. Find $V_{th}$ = open-circuit voltage, $R_{th}$ = looking-back resistance.

Time for a first-order system to reach 63.2% of final value. RC circuit: $\tau = RC$. RL circuit: $\tau = L/R$. After 5τ, transient is 99% complete.

Ratio of output to input in Laplace (s) or Z domain. $H(s) = Y(s)/X(s)$. Describes system behavior: poles determine stability, zeros shape frequency response.

Logic family using BJTs. 5V supply, fast switching. Legacy but still used. Voltage levels: LOW < 0.8V, HIGH > 2.0V.

Simple serial protocol with no clock line. Both devices must agree on baud rate. Frame: start bit, 8 data bits, optional parity, stop bit. Common rates: 9600, 115200 baud.

In inverting op-amp configurations, the inverting input is held at ground potential by negative feedback, though not physically connected to ground. Simplifies circuit analysis.

Oscillator whose frequency varies with input voltage. Key component in PLLs and FM modulators. Sensitivity measured in Hz/V or MHz/V.

Discrete-time equivalent of Laplace transform. Converts sequences to z-domain. Essential for digital filter design and discrete control systems.

Diode designed to operate in reverse breakdown. Maintains nearly constant voltage across it (Zener voltage). Used for voltage regulation and reference. Common values: 3.3V, 5.1V, 12V.